Designed a 4-bit counter using a J-K flip-flop that has a clocked input with reset. Performed simulations of various output parameters like rise time and fall time. The design is done using cadence ...

The circuit was constructed to produce a frequency divider with the use of flip flops which are the basic building blocks of sequential logic circuits while forming a T flip-flop configuration. Toggle ...

In this paper, the authors deal with the testable design of conservative logic based sequential circuits by using two test vectors. The conservative logic based sequential circuits are built from the ...